计算机术语“verification mode”的中英文意思、释义、翻译及用法-计算机英汉双解词典

术语	verification mode
释义	verification mode 验证方式；［证实模态］ In systems with time sharing, a mode of operation under the EDIT command in which all subcommands are acknowledged and any textual changes are displayed as they are made. 在分时系统中，在EDIT(编辑)命令下的一种操作方式，其中任何子命令均被认可，而且任何文本的变动均按所作的修改显示。
随便看	negative entry negative feedback negative ignore gate negative indication negative indicator negative logic negative polling limit negative poll response negative response negativetrue logic negator negentropy negotiable BIND neighbour neighbourhood effect neithernor operation neper nest nested command nested conditional instruction nested macrocalls nested macros nested routine nesting level nesting loop

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