| 释义 |
state assignment
状态分配
A step of procedure in designing sequential logic circuits which assign binary codes to all states (corresponding to the states of flipflops) which describe the sequential circuit. Proper state assignment makes the circuit designed simpler. Moreover, during the state assignment for an asynchronous sequential circuit, the circuit must be assured of no race hazard.
时序逻辑电路设计过程中的一个步骤,对所有用于描述时序电路的状态分别指定二进制的 编码(与触发器的状态相对应)。合理的状态分配可使设计出的电路比较简单。另外, 对异步时序电路进行状态分配时,必须保证电路不出现竞争冒险。 |