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术语 adder-accumulator
释义 adder-accumulator
加法累加器
In some systems,the adder is a 4bit parallel binary adder with an internally connected carry for implementing precision arithmetic operations.The adder operates with the 4bit accumulator to form the arithmetic logic unit (ALU) section of the CPU.In addition to its arithmetic functions,the accumulator is the primary working register in the CPU and is the central data interchange point for most all data transfer operations occurring in the system.During internal data transfer, the accumulator is the interfacing data register for both randomaccess memory (RAM) and readonly memory (ROM).For external data changes(input/output) the accumulator is the source of the output data and the receiver register for the input data.
在某些系统中,加法器是一个具有内接进位的4位并行二进制加法器以实现精确算术运 算。这种加法器与4位累加器一起工作,形成CPU的算术逻辑部件ALU。除了它的算术功能外, 该累加器是CPU中的主要工作寄存器,又是数据的中央交换点,由它完成系统中几乎全部数据 传输操作。在内部数据传输过程中,累加器作为随机访问存储器RAM和只读存储器ROM的接口 数据寄存器。对于外部数据交换(输入/输出),累加器作为输出数据源以及输入数据的接收 寄存器。
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