| 术语 | microprocessor cache memory |
| 释义 | microprocessor cache memory 微处理机［器］超高速缓冲存储器 A cache memory which consists of a cluster of bipolar units arranged in four blocks of four words each. Each memory board contains one cache. When addressing memory, the CPU checks cache and main memory. If the word is in cache, the data are transferred. An error check doesn't require extra CPU time. Error-detection/correction memories use 5 bits more than noncorrecting units. The extra bits are for a computation made by both memory and CPU when they exchange data. 一种超高速缓冲存储器,由若干双极性单元按4块排列的群体组成,每块有4个字。当对存储器寻址时,由CPU检查超高速缓冲存储器 和主存储器。如该字在超高速缓冲存储器中,数据即被传送出去。检查错误并不需要额外的C PU时间,存储器检错和纠错比无纠错存储器多用了5位,这额外的位数当存储器和CPU交换数据 时,为二者计算所使用。 |
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