计算机术语“bus transceiver”的中英文意思、释义、翻译及用法-计算机英汉双解词典

术语	bus transceiver
释义	bus transceiver 总线收发器;［汇流排收发机］ Refers to a type of high performance low-power Schottky circuit that is intended for bipolar or MOS microprocessor applications. Such devices typically consist of four Dtype edge-triggered flip-flops with a builtin two-input multiplexer on each. 专指一种高性能、低功耗肖特基线路。它是专门为双极型和MOS型微处理器设计的。典型的总线收发器由四个边缘触发的D触发器组成,每个触发器都带有双输入的多路开关。
随便看	clear confirmation signal clear cryptographic key clear data clear display clear entry clear-forward signal clearing clear instruction clear key clear memory clear session clear signal clear storage cleartext clear-to-send clipping CLIST CLK clock clock circuit clock comparator clock counter clock cycle clocked data one(CD1) clocked data zero(CD0)

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